IXFK94N50P2
IXFX94N50P2
120
Fig. 7. Input Admittance
140
Fig. 8. Transconductance
100
80
T J = 125oC
25oC
- 40oC
120
100
80
T J = - 40oC
25oC
125oC
60
60
40
40
20
0
20
0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
7.0
0
10
20
30
40
50
60
70
80
90
100
110
120
300
V GS - Volts
Fig. 9. Forward Voltage Drop of Intrinsic Diode
10
I D - Amperes
Fig. 10. Gate Charge
9
V DS = 250V
250
200
150
8
7
6
5
4
I D = 47A
I G = 10mA
100
50
0
T J = 125oC
T J = 25oC
3
2
1
0
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
0
50
100
150
200
250
100,000
f = 1 MHz
V SD - Volts
Fig. 11. Capacitance
1000
Q G - NanoCoulombs
Fig. 12. Forward-Bias Safe Operating Area
R DS(on) Limit
10,000
1,000
Ciss
100
10
100μs
Coss
1ms
100
1
10
Crss
0.1
T J = 150oC
T C = 25oC
Single Pulse
10ms
100ms
0
5
10
15
20
25
30
35
40
10
100
1,000
V DS - Volts
IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.
V DS - Volts
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